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Jai
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Jai Dhar

Lead Hardware Engineer at Avionica

Mountain View

About me

Experienced System-level Hardware Designer with a broad range of supporting knowledge including: - Complex hardware design tasks including high-speed+mixed-signal products (PCB Layout and Schematic design) - Wireless/RF Hardware design for 802.11a/b/g/n (WLAN) and 802.16e (WiMax) - FPGA IP Core development (VoIP, DSP...) with both Altera and Xilinx products - High-end silicon prototyping FPGA hardware platform designs - High-speed PHY-layer implementation and debug of protocols such as GigE, SATA, XAUI, PCI-e, USB 2.0... - Embedded Firmware design on Altera NIOS II, TI C6x DSPs and Motorola Coldfire platforms - Linux device driver development for Embedded Operating Systems (uClinux) - lead device-driver contributor for Altera NIOS II uClinux platform - Debugging knowledge at all levels ranging from hardware to software

Days available for lunch

April
29
April
30
May
01

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